Senior Engineer Layout

☞ Microchip Technology Inc.

Ver: 217

Dia de atualização: 24-10-2024

Localização: Heilbronn Baden-Württemberg

Categoria: Alta tecnologia Mecânico / Técnico Elétrica / Eletrônica

Indústria: Electrical Electronic Manufacturing Semiconductors

Posição: Mid-Senior level

Tipo de empregos: Full-time

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Conteúdo do emprego

Company Description

Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash-IP solutions that are incorporated in a broad range of products.

Job Description

The Heilbronn site designs and tests ICs for the automotive market, including CAN and LIN bus transceivers, motor drivers and car access solutions.

When you are creative, highly motivated, interested in a best mix of independent work and team-work, technically fascinated, ready to learn and share your knowledge in a global company, then you are right in our team!

Microchip offers an interesting, challenging and inspiring opportunity to develop advanced analog/ mixed signal Layout designs for automotive applications, embedded in a global organization of Layout- and Design teams.
  • Be an active member of global organized Layout- and project teams
  • Create Layout of CMOS analog/ mixed signal circuits using Cadence tools
  • Consider different constraints like matching, coupling, current density, block-/ die size,…
  • Perform complete Layout verification on block- and top-level by following Design rules and -recommendations using Cadence/ Calibre tools
  • Complete final verification and stream out procedures
  • Cooperate closely with support-teams (CAD, TD, PE, Assembly)
  • Comply deadlines from project plan
  • Provide mentoring to junior Layout Engineers
Job Requirements
  • Degree in Electronics, Automatics or Electrical Engineering
  • At least 7 years experience in analog/ mixed signal CMOS Layout
  • Deep understanding of analog circuit concepts
  • Experience in Layout floor planning, custom Layout and hierarchical Layout assembly
  • Interest to deepen knowledge and skills in analog IC Layout
  • Able to work with cross-functional teams
  • Have excellent interpersonal skills and positive energy
Preferred Skills
  • German and English language fluently
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Data limite: 08-12-2024

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