Master Thesis Student
Ver: 276
Dia de atualização: 07-10-2024
Localização: Heilbronn Baden-Württemberg
Categoria: Planejamento / Projetos Design - Web Alta tecnologia Mecânico / Técnico Elétrica / Eletrônica Estágio / Nível inicial
Indústria: Electrical Electronic Manufacturing Semiconductors
Posição: Internship
Tipo de empregos: Temporary
Conteúdo do emprego
Company DescriptionMicrochip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash-IP solutions that are incorporated in a broad range of products.
Job Description
Master’s thesis 2021 “Mixed-signal device DFT implementation” at Microchip
Title: “DFT concept for new SIC-CAN transceiver design”
Location: Ferdinand-Braun-Straße 4/1, 74074 Heilbronn, Germany
Contact: Clemens Hauser, Technical Staff Engineer-Test, clemens.hauser@microchip.com, +49-7131-7240-187
Background
Each sold IC device gets tested to guarantee functionality and parameter limits described in data sheet. Production testers are expensive and test time will have a big impact of overall device cost. Especially for automotive ICs where devices get tested with multiple insertions to guarantee parameter values over full temperature range. With the 0ppm strategy from Automotive customers additional tests are needed to find already weak devices which may fail over lifetime.
To deal with these issues a DFT concept will collect all requirements. The DFT concept shall contain following topics:
- Match all parameters from data sheet with a test strategy which can done easily during ATE test with a production tester.
- Define tests.
- Deal with parasitic effects from test equipment which cannot get avoided and develop strategies to overcome effects.
- Describe added test circuitry integrated into device.
- Describe added test circuitry on tester board. These are for example test access, trim strategy, etc.
- Describe test flow and specifications.
Task Description
As master’s thesis student at Microchip, you will
- Work on a new device in a project team.
- Define DFT implementations together with design engineers.
- Simulate device parameter dependent on parasitics with Cadence CAD tools.
- Define test specification using DFT implementations.
We expect you to work on-site in Heilbronn, as much as possible depending on COVID situation.
You will be part of a multi-site project team. It will need frequent interactions with analog design and test engineers.
We can adjust details of the tasks / scope in discussion with you and with your university.
You will be able to write a master’s thesis on your work, but some confidential data (intellectual property) may need to be omitted in the thesis, if it needs to be published.
Job Requirements
- Basic knowledge in analog circuit design
- Bachelor’s degree in electrical engineering or some related field
- Interest to deepen knowledge and skills in analog IC design
Data limite: 21-11-2024
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