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工作内容
Synopsys is searching for an enthusiastic and creative Software Engineer for Processor Design and Verification Tools.In its engineering team located in Leuven (Belgium), Aachen (Germany), and Eindhoven (The Netherlands), Synopsys develops design tools for application-specific processors (ASIPs) and provides related customer support. Our “ASIP Designer” tool-suite is used by customers worldwide in the development of systems-on-chip (SoC) for 5G wireless communication, deep learning, artificial intelligence, autonomous driving, biomedical applications, the internet of things, and similar.
The Role
As a Software Engineer you will enhance existing design tools, and you will develop new tools for ASIPs. Further, you will advise Application Engineers to guide our customers in developing, implementing, and verifying advanced systems-on-chip with ASIP Designer, for exciting next-generation products.
The current job opening is in the ASIP modeling and implementation team, where important tools are an instruction set simulator (ISS) and a hardware description language (HDL) generator. The job opening is primarily to help building new processor verification flows.
- The ISS performs cycle-accurate and instruction-accurate simulations, using run-time optimization technology (based on LLVM).
- The HDL tool generates register transfer level (RTL) code (Verilog or VHDL) to be synthesized into a physical HW implementation.
- The verification flows have all kinds of automated program simulation set-ups, including automatic generation of test programs. This is complemented by property-based formal verification for model checking.
To apply for this job
- You must have an MSc or PhD degree in Engineering, with excellent C++ programming skills.
- You have basic knowledge of processor architectures.
- You have solid problem-solving skills and good communication skills.
- You have sound interest in areas related to the tools described above. Experience in some of these areas is an important advantage, with knowledge of for example: (formal) processor verification, SystemVerilog, UVM, VHDL, SystemC/TLM, LLVM, etc.
More information on ASIP Designer can be found on www.synopsys.com/asip .
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
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Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
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最后期限: 06-12-2024
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