Loading ...
Loading ...
ASIC Verification Engineer
전망: 146
갱신일: 22-10-2024
위치: Duisburg North Rhine-Westphalia
범주: 품질 보증 / 품질 관리
수평: Entry level
직업 종류: Full-time
Loading ...
작업 내용
As a leading Engineering and technology solutions company, Cyient’ s Semiconductor business unit is a key contributor to our success. With several blue-chip customers across the world, we are proud to work on cutting edge technology, shortening development lead times, improving performance, and enabling the technology of tomorrow.Cyient brings more than 20 years of experience in semiconductor and software systems solutions and services. We offer a complete capability across the semiconductor value chain, from design services to custom turnkey ASIC solutions. Our strong technical and domain expertise with a robust partnership ecosystem makes us a trusted global semiconductor partner, giving our engineers the opportunity to work on cutting edge projects, to make a difference and to develop themselves.
Why work for Cyient:
Our Semiconductor team works on cutting edge technology from AI led chip design to IOT and embedded intelligence. This is your chance to work for an innovative team and build your technical prowess. Our engineers have the opportunity to work across the product lifecycle. Are you looking to expand your skills across the value chain? Our project leads recognize talent and growth aspirations, helping you expand your technical skills. Our semiconductor business serves multiple industries such as industrial, medical, and automotive. We are uniquely positioned to bring innovation from each domain for our custom ASIC solutions and semiconductor services. Cyient has locations across the world, with three main delivery centers in India – Hyderabad, Pune, and Bangalore. We offer the flexibility to work in different delivery sites while working closely with our customers at the same time.
Whatever your particular area of expertise, at Cyient there is opportunity for personal growth. With the breadth of customers, projects, and the sectors that we are active in there are unique and exciting career paths to explore.
We are a fast growing and expanding organization and we want you to join us in our journey in designing the chips of the future!
Apply today!
For more information: https://www.cyient.careers/careers/get-to-know-us
Job Description
Key responsibilities
- Owns the verification process in the project.
- Features/Requirements extraction from the specification.
- Verification planning.
- Verification environment/testcase development.
- Responsible for the quality of the verification.
- Knowledge sharing among the digital design community and involvement in lessons learned and efficiency improvement forums.
- Contributes to the achievement of the quality objectives.
Verification
- Develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers.
- Write a verification plan using random techniques and coverage analysis, and work with designers to ensure it is complete.
- Develop tests and tune the environment to achieve coverage goals.
- Own and debug failures in simulation to root cause problems.
- Architecting, developing, and maintaining verification tools/methods to streamline the design of state-of-the-art SoCs/Chips.
- Analysis/closure of code and functional coverage.
- Work closely with architects/RTL designers to bring up a new architecture/micro-architecture on the verification environment.
- self-contained tracking of efforts.
- reporting to team-lead and project management.
- Knowledge sharing.
- tracking of effort progress and immediate articulation of potential technical target achievement risks.
- skill-related duties as assigned and according to the priorities of the moment.
- Is committed to complying with the requirements of the Quality Management System that are related to the job title and to possible changes of the system.
- Is committed to developing and implementing Cyient Quality Management System and continually improving its effectiveness.
- Uses Cyient issue tracking system to post customer complaints, non-conformities and quality improvement proposals.
- Self-contained Digital Verification engineering work within project constraints.
Education/experience:
- Master’s Degree in electrical engineering or equivalent experience.
- Fundamental understanding of SoC design and CPU/DSP.
- 0 to 2 years of prior experience in verification.
- Understanding of coverage, constrained-random, transaction level.
- Experience with System Verilog, Assertions and UVM.
- Experience with Gate level simulations.
- Experience with C/C++.
- Experience with python or a similar scripting language is a plus.
- Technical: A basic knowledge of digital electronics.
- Language: Fluency in English, both written and spoken.
- Personal:
- Excellent problem-solving and analytical skills.
- Excellent planning & organizing skills.
- Able to work in a team.
- Stress-resistant and result-oriented.
- Experience with low power verification (CPF/UPF).
- Experience with formal verification.
- Experience with scan/test modes verification.
Block Level Verification, Systems Verification, Universal Verification Methodology, Verification and Validation
Cyient is an Equal Opportunity Employer.
Cyient recruits, employs, trains, compensates, and promotes regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender, gender identity or expression, veteran status, and other protected status as required by applicable law. We are proud to be a diverse and inclusive company where our people can focus their whole self on solving problems that matter.
Loading ...
Loading ...
마감 시간: 06-12-2024
무료 후보 신청 클릭
작업 보고
Loading ...
동일한 작업
-
⏰ 01-12-2024🌏 Konstanz, Baden-Württemberg
-
⏰ 01-12-2024🌏 Augsburg, Bavaria
-
⏰ 01-12-2024🌏 Munich, Bavaria
-
💸 €65,000/yr - €80,000/yr⏰ 01-12-2024🌏 Bielefeld, North Rhine-Westphalia
Loading ...
-
⏰ 01-12-2024🌏 Munich, Bavaria
-
⏰ 01-12-2024🌏 Koblenz, Rhineland-Palatinate
-
⏰ 01-12-2024🌏 Frankfurt am Main, Hesse
-
⏰ 01-12-2024🌏 Leipzig, Saxony
Loading ...
-
⏰ 01-12-2024🌏 Bielefeld, North Rhine-Westphalia
-
⏰ 01-12-2024🌏 Kiel, Schleswig-Holstein