DFT Engineer (M, F, D)

☞ Apple

Aussicht: 117

Update Tag: 27-10-2024

Ort: Munich Bavaria

Kategorie: Informationstechnologie Beratung / Kundenservice Kunst / Design

Industrie:

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Jobinhalt

Summary

Posted: Jun 7, 2024

Role Number:200554759

This position will be for a determined time period of 2 years, starting July 2024 ending in July 2026. Imagine what you could do here. At Apple, new ideas have a way of becoming outstanding products, services, and customer experiences very quickly. Every single day, people do amazing things at Apple. Do you want to impact billions of users by developing extraordinary products with a prime focus on accuracy and performance of the product? You will become part of a hands-on development team that furthers engineering excellence, creativity and innovation. Dynamic, inspiring people and innovative technologies are the norm here. We want you to join our team if you are an innovative engineer with the dream to research and develop solutions that do not yet exist. Will you help us design future generations of revolutionary Apple products? Are you an engineer with a strong foundation and real passion for building new technologies? Do you have track record in leading DfT efforts for complex chip designs? Join us!

Description

As a DFT Engineer you will: Develop and implement DfT architecture Work with the validation team to verify DfT implementations and implement design changes Generate structural test vectors, analyze and improve coverage Work with designers on STA, physical, power and logical issues Work with Test Engineers to bring up test vectors on silicon
  • Master Degree in Electrical / Computer Engineering or equivalent;
  • We are counting on your expertise and knowledge about industrial standards and practices in DfT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time;
    • You are confident with Verilog and / or VHDL, and have experience with simulators and waveform debugging tools;


Preferred Qualifications
  • By now you are demonstrating confirmed understanding of design verification (DV) methodologies for validating DfT implementation in simulation pre-silicon;
  • You have knowledge on how to debug ATPG patterns, compressed ATPG patterns, MBIST, and JTAG/1500 related issues;
  • You have experienced with STA constraints development and analysis for DfT modes and SDF simulations;
  • You love conducting experiments during silicon debug, capturing and analyzing data; and use scripting to support efficient handling of ATE data;
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Frist: 11-12-2024

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